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Technology

Storage Developer Conference

Updated 10 days ago

Technology
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Storage developer Podcast, created by developers for developers.

Read more

Storage developer Podcast, created by developers for developers.

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iTunes Ratings

2 Ratings
Average Ratings
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0
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Cover image of Storage Developer Conference

Storage Developer Conference

Updated 10 days ago

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Storage developer Podcast, created by developers for developers.

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Rank #1: #100: A Comparison of In-storage Processing Architectures and Technologies

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In-situ processing, in-storage processing, smart SSD, computational storage… Many names to define the same concept: a closer integration of computing capabilities and data storage in order to reduce data movement leading to better performance and lower power consumption. This is a new trend in storage and computing architectures. How can we define this new type of products: storage with embedded processing, or processing with embedded storage?

This talk presents an analysis of the in-storage processing trend, including a comparison of different architectures, the presentation of a computing and storage technologies roadmap, and a list of applications use cases.

Learning Objectives: 1) In-storage processing architectures; 2) Technology roadmap for integration; 3) Application use cases.
Jun 24 2019
39 mins
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Rank #2: #99: SNIA Nonvolatile Memory Programming TWG - Remote Persistent Memory

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The SNIA NVMP Technical Workgroup (TWG) continues to make significant progress on defining the architecture for interfacing applications to PM. In this talk, we will focus on the important Remote Persistent Memory scenario, and how the NVMP TWG’s programming model applies. Application use of these interfaces, along with fabric support such as RDMA and platform extensions, are part of this, and the talk will describe how the larger ecosystem fits together to support PM as low-latency remote storage.

Learning Objectives: 1) Persistent Memory programming; 2) RDMA extensions; 3) SNIA PM initiatives.
Jun 17 2019
47 mins
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Rank #3: #98: Rethinking Ceph Architecture for Disaggregation Using NVMe-over-Fabrics

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Ceph protects data by making 2-3 copies of the same data but that means 2-3x more storage servers and related costs. It also means higher write latencies as data hops between OSD nodes. Customers are now starting to deploy Ceph using SSDs for high-performance workloads and for data lakes supporting real-time analytics. We describe a novel approach that eliminates the added server cost by creating Containerized, stateless OSDs and leveraging NVMe-over-fabrics to replicate data in server-less storage nodes. We propose redefining the boundaries of separation within SDS architectures to address disaggregation overheads. Specifically, we decouple control and data plane operations and transfer block ownership to execute on remote storage targets. It also dramatically reduces write latency to enable Ceph to be used for databases and to speed up large file writes. As part of the solution, we also describe how OSD node failover is preserved via a novel mechanism using standby stateless OSD nodes.

Learning Objectives: 1) Storage disaggregation; 2) NVMe over fabrics; 3) Ceph architecture.
Jun 10 2019
34 mins
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Rank #4: #97: Delivering Scalable Distributed Block Storage using NVMe over Fabrics

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NVMe and NVMe over Fabrics (NVMe-oF) protocols provide a highly efficient access to flash storage inside a server and over the network respectively. Current generation of distributed storage software stacks use proprietary protocols which are sub-optimal to deliver end to end low latency. Moreover it increases operational complexity to manage NVMe-oF managed flash storage and distributed flash storage in private cloud infrastructure. In this session, we present NVMe over Fabrics based high performance distributed block storage that combines the best of both worlds to deliver performance, elasticity and rich data services.

Learning Objectives: 1) NVMe, NVMe-oF for flash data path IO architecture; 2) Programming, architecture and optimization for flash; 3) Distributed storage, data services.
Jun 03 2019
48 mins
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Rank #5: #96: Solid State Datacenter Transformation

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Intel Fellow Amber Huffman has been at the center of Intel’s development for SSDs, with emphasis on SSD storage interfaces and next generation form factors. In this talk, she will discuss the rationale behind decisions that were made in advancing storage architecture leading to the emergence of solid state only Data Centers. Amber will also discuss the key factors influencing the future of the Data Center and the important role storage continues to play.
May 20 2019
48 mins
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Rank #6: #95: Tunneling through Barriers

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Join Dr. Andy Walker for a wonderfully illustrated tour through 90 years of physics and materials science, leading to modern solid state memory technologies via “The Golden Thread of Tunneling.”
May 13 2019
44 mins
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Rank #7: #94: Key Value Storage Standardization Progress

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NVMe KV is a proposal for a new command structure to access data on an NVMe controller that is being developed within the NVMe technical working group. This proposed command set provides a key and a value to store data on the Non Volatile media and provides a key to retrieve data stored on the media. In addition to the work on the NVMe specification, the SNIA is also working on a KeyValue API. This presentation will describe the standardization efforts going on in both the NVMe working group and SNIA.

Learning Objectives: 1) What is Key Value Storage; 2) Where are we at in the NVMe standardization process of NVMe KV; 3) Where are we at in the SNIA standardization process of a KV API?
May 06 2019
47 mins
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Rank #8: #93: Redfish Ecosystem Update

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The DMTF’s Redfish is an open industry standard specification and schema that specifies a RESTful interface and utilizes JSON and OData to help customers integrate solutions within their existing tool chains.

Designed to meet the expectations of end users for simple, modern and secure management of scalable platform hardware, the Redfish method and approach has seen accelerated adoption across the IT infrastructure management standards community.

This session provides an overview of the Redfish standard as well as information about what’s new in the Redfish ecosystem, including PLDM for RDE (Redfish Device Enablement) and other DMTF updates as well as consideration and adoption in the broader standards community. This session will then cover the general data model including the base storage models and infrastructure that are used by the SNIA Swordfish extensions.

Learning Objectives: 1) Basic understanding of the Redfish data model hierarchy; 2) Knowledge of the problem areas to which the Redfish methodology is being applied; 3) Understand how RDE brings Redfish “inside the box” for network & other devices.
Apr 30 2019
52 mins
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Rank #9: #92: Fibre Channel – The Most Trusted Fabric Delivers NVMe

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As data-intensive workloads transition to low-latency NVMe flash-based storage to meet increasing user demand, the Fibre Channel industry is combining the lossless, highly deterministic nature of Fibre Channel with NVMe. FC-NVMe targets the performance, application response time, and scalability needed for next-generation data centers while leveraging existing Fibre Channel infrastructures. This presentation will provide an overview of why Fibre Channel’s inherent multi-queue capability, parallelism, deep queues, and battle-hardened reliability make it an ideal transport for NVMe across the fabric.

Learning Objectives: 1) A reminder of how Fibre Channel works; 2) A reminder of how NVMe over Fabrics work; 3) A high-level overview of Fibre Channel and NVMe, especially how they work together.
Apr 16 2019
32 mins
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Rank #10: #91: Memory Class Storage and its Impact

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Nantero NRAM™ is a new class of memory with the potential to add non-volatility to existing RAM applications. It can be arranged in a crosspoint structure for large memories or a 1T-nR arrangement for smaller faster arrays, in standalone devices or as embedded RAM. NRAM uses carbon nanotubes in a dielectric-free structure to achieve unlimited write endurance. While there are obvious advantages to this class of device, including replacing DRAM in storage devices, there are a number of less obvious changes to how designers approach the data storage hierarchy. Decoupling cache size from battery backup power lets designers rethink performance profiles. Exploitation of various interfaces into the system are examined, from SATA to PCIe to the many options in the DRAM bus. This presentation also explores the growing application space for artificial intelligence, deep learning, and in-memory computing and considers the impact of a high performance non-volatile memory in those use cases.

Learning Objectives: 1) Awareness of performance characteristics of a DRAM-class non-volatile memory in crosspoint and 1T-nR configurations; 2) Non-obvious use cases for NRAM; 3) Application of non-volatile memory in AI / deep learning engines.
Apr 08 2019
52 mins
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